Conventionally, for example, as disclosed in JP 2011-119542 A, an IGBT is known which is provided with two buffer layers having different impurity concentrations on a drift layer reverse side. The IGBT according to this publication is provided with a low impurity concentration buffer layer located away from a p+ collector layer of the IGBT and a high impurity concentration buffer layer located near the p+ collector layer.
It is one of features of the technique relating to this publication that a total thickness and a total impurity amount of the low impurity concentration buffer layer and the high impurity concentration buffer layer are confined within a certain range. Paragraph 0022 of the publication describes a specific structure of a buffer layer 24 which is the low impurity concentration buffer layer, having an impurity concentration of 2×1016 cm−3, a thickness of 40 μm and a total impurity amount of 8×1013 cm−2.
The low impurity concentration buffer layer located away from the p+ collector layer according to the above prior art will also be called hereinafter a “deep low concentration buffer layer” in the sense that it is a buffer layer formed deep in the drift layer and having a relatively low impurity concentration. Meanwhile, the high impurity concentration buffer layer located near the p+ collector layer according to the above prior art will also be called hereinafter a “shallow high concentration buffer layer” in the sense that it is a buffer layer formed shallow in the drift layer and having a relatively high impurity concentration.
When no shallow high concentration buffer layer is provided, the lower the impurity concentration of the deep low concentration buffer layer, the significantly greater a leakage current of the IGBT becomes. When a shallow high concentration buffer layer is provided, there is an advantage that the leakage current is reduced to a sufficiently small level even when the impurity concentration of the deep low concentration buffer layer is low.
On the other hand, when the impurity concentration of the deep low concentration buffer layer is too high, there is a disadvantage that an electric field on the drift layer reverse side in a safe operation region becomes too high in the event of short circuit current interruption. The safe operation region at the time of short circuit current interruption is one of capabilities of a switching element and is also called “SCSOA (short circuit safe operating area).” Although an impurity concentration of the deep low concentration buffer layer needs to be designed so as to fall within an adequate range, JP 2011-119542 A above has merely disclosed a concentration which is high to a certain degree, and has not given sufficient consideration to SCSOA.
JP 2011-119542 A above does not provide specific description of dopants of the shallow high concentration buffer layer and the deep low concentration buffer layer and a manufacturing method therefor. As a result of intensive research, the inventor of the present invention came to find a preferable method for manufacturing a semiconductor device provided with a shallow high concentration buffer layer and a deep low concentration buffer layer.
One of capabilities of a switching element is a reverse bias safe operation area (RBSOA). As a result of intensive research, the inventor of the present invention came to find a preferable structure that satisfies a good RBSOA.